The 74HC4060D is a high-speed Si-gate CMOS device a下很nd is pin compatible with the HEF4門窗060.

The 74HC4060D are 14-stage ripple-ca從你rry counter/dividers劇腦 and oscillators with three oscill行裡ator terminals (RS, RTC and CT對中C), ten buffered outputs (Q3 to木影 Q9 and Q11 to Q13) and an o都鄉verriding asynchronous master謝光 reset (MR). The oscillator configurati河相on allows design of either RC or cr城場ystal oscillator circuits. Th身紙e oscillator may be 了都replaced by an external cl內不ock signal at input RS. In t制少his case keep the other oscillato呢議r pins
(RTC and CTC) floating. T會坐he counter advances on th湖空e negative-going transiti間花on of RS. A HIGH level on MR resets個動 the counter (Q3 to Q9些為 and Q11 to Q13 = LOW), i火美ndependent of other inpu高美t conditions. In the HCT vers問謝ion, the MR input is TTL 資煙compatible, but the RS input has CMOS i費房nput switching levels and can be dri話舊ven by a TTL output by using a pull-up拍明 resistor to VCC.

74HC4060D Features:

All active components on chip
RC or crystal oscilla生算tor configuration
Complies with JEDEC s呢視tandard no. 7 A
ESD protection:
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package optio舞數ns
Specified from -40 °C to +85 °C and朋放 from -40 °C to +125火拍 °C
Applications:

Control counters
Timers
Frequency dividers
Time-delay circuits